Reducing device stress and switching losses using active gate drivers and improved switching cell design

Aachen / ISEA (2018) [Book, Dissertation / PhD Thesis]

Page(s): 1 Online-Ressource (xiii, 195 Seiten) : Illustrationen, Diagramme


Today’s power converter designs, especially in the automotive or the all-electrical aircraft industry, aim at higher power densities. These goals can be achieved with an increased integration level and a transition from silicon insulated-gate bipolar transistors (IGBTs) to fast switching wide-bandgap (WBG) devices. The aims of this thesis are to investigate the influence of the packages and the driving circuits on the switching behavior of silicon (Si) IGBTs and silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs). The peak voltages and surge currents during switching determine the stress on the devices. The stress depends on several parasitic elements in and around the switching cell and the gate driving circuitry. A reduction of the stress could result in the possibility to utilize a higher dc-link voltage or increased efficiency, and thus, lead to significant cost reduction. First, simulative and measurement techniques to identify and parametrize inductive and capacitive parasitics of the packages are shown. The presented concepts are demonstrated using a power module package and a common package of a discrete power semiconductor. As such, a wide range of different power electronics packages are covered in this thesis. In a second step, the influence of the different parasitic inductive elements on the switching transients is investigated. Therefore, a switching cell using variable inductive elements is developed. The variable inductive elements are the loop, gate and common-source inductances for both, the low- and high-side switches. The impact of each inductive element on the switching behavior is investigated regarding the stress on the device and the resulting switching losses. The limitations of the cell design on the switching performance and the causes for the observed oscillations are identified. Conclusions are drawn for improved power module designs for low- and medium-voltage applications. To influence the switching behavior of the device, a switched resistor, stage-wise gate driver is designed for a silicon IGBT power module, and a SiC MOSFET switching cell. The challenges of an active gate driver design for fast switching wide-bandgap power semiconductors and the challenges of high-bandwidth voltage and current measurements are discussed. For both, the IGBT and the SiC MOSFET, the stresses are reduced while maintaining equal switching losses. It is shown that the switching transients can be manipulated to balance device stresses and switching losses. The use of active gate drivers shows, that it is possible to reduce the stress on the device in addition to the impact of the switching cell design. As such, it is shown in this thesis, that the switching performance can be further improved for power semiconductors in packages that are electrically not optimal, due to third-party design and production constraints.



Engelmann, Georges


de Doncker, Rik W.
Heinen, Stefan


  • REPORT NUMBER: RWTH-2018-228973